It is very desirable to design an effective narrow-band filter that decimates or interpolates the incoming signals in various communication and signal processing systems. Using multiplierless decimation filters with a polyphase FIR filter structure, this work proposes a hardware efficient compensated CIC filter over a limited band frequency that boosts the speed of down sampling. In every signal processing system, the FIR filter is one of the most basic processing units. The proposed work investigated the performance of a compensated CIC filter based on improved frequency response and reduced hardware complexity in terms of the number of adders and multipliers, and produced filtered results with no changes. CIC compensator filter indicated that utilising compensation with CIC filter improves frequency response in passed of interest by 26.57 percent while reducing hardware complexity by 12.25 percent MPIS and 23.4 percent APIS w.r.t. FIR filter, to be precise.
Department of Electronics and Communication Engineering, UIET, C.S.J.M. University, Kanpur-24 (U.P.), India.
Department of Electronics Engineering, H.B.T.I., Kanpur (U.P.), India.
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